ANJALI; DR. PADMAVATI. Design and verification of a Time-Triggered and Priority-Driven CAN Protocol Using SystemVerilog. Journal of Scientific Research and Technology, [S. l.], v. 4, n. 2, p. 104–117, 2026. Disponível em: https://jsrtjournal.com/index.php/JSRT/article/view/418. Acesso em: 23 oct. 2026.